TSMC’s AI Expansion Signals a Broader Shift in Computing

TSMC’s AI Expansion Signals a Broader Shift in Computing
by Daniel Nenni on 10-16-2026 at 8:00 am

TSMC’s AI expansion

TSMC is describing an artificial intelligence boom that reaches beyond accelerator chips into the wider computing infrastructure needed to support increasingly capable AI systems. On the recent investor call, Chairman and CEO Dr. C.C. Wei presents strong demand, persistent supply constraints and an ambitious expansion … Read More


Delivering Silicon Systems Through AI Disruption, Part 1: Writing the Score

Delivering Silicon Systems Through AI Disruption, Part 1: Writing the Score
by Joel Jorgensen on 10-14-2026 at 8:00 am

Writing the Score SemiWiki

Score: the written music for an orchestra, with every section’s part laid out on the same page so they play together. In this article, it’s your designed workflows.

Is AI helping you hit your tape-out date, or putting it at risk? How would you know?

Every Director I talk to is being asked to use AI to deliver faster, or better,… Read More


TSMC 2026 OIP Ecosystem Forum Summary

TSMC 2026 OIP Ecosystem Forum Summary
by Daniel Nenni on 10-09-2026 at 8:00 am

TSMC Ecosystem Forum Summary

TSMC’s 2026 Open Innovation Platform Forum presented artificial intelligence as the force reshaping semiconductor design. Its central argument is that faster chips will require progress across the whole system: logic, memory, packaging, interconnects, power delivery and design methods. TSMC places its partner ecosystem… Read More


From Cloud to Silicon: IC-Link and TSMC Open the Door

From Cloud to Silicon: IC-Link and TSMC Open the Door
by Daniel Nenni on 10-07-2026 at 8:00 am

From Cloud to Silicon IC Link and TSMC Open the Door

Access to advanced semiconductor technology involves much more than choosing a process node. Design teams also need computing capacity, compatible tools, secure technology access, and experienced support. IC-Link by imec’s expanded collaboration with TSMC addresses that combination, potentially making sophisticated… Read More


Beyond the Die: Verifying the Connected Chip

Beyond the Die: Verifying the Connected Chip
by Daniel Nenni on 10-06-2026 at 10:00 am

Efficient, Scalable Methodology for Reliability and ESD Verification of Complex 3D IC CoWoS Systems

One of the standout presentations at the 2026 TSMC OIP Forum highlighted a collaboration between Siemens EDA, Marvell, and TSMC. I always appreciate EDA presentations that bring together customer and foundry perspectives, and this one did not disappoint. We follow 3D IC technology closely and have published more than 150 blogs… Read More


TSMC OIP Ecosystem Forum 2026: Spotlight on Emerging Technologies

TSMC OIP Ecosystem Forum 2026: Spotlight on Emerging Technologies
by Mike Gianfagna on 10-02-2026 at 8:00 am

TSMC OIP 2026 Emerging Technologies Alley

The TSMC OIP Ecosystem Forum highlighted many accomplishments across TSMC’s vast ecosystem. Specific achievements with TSMC as well as collaborative work across several companies were all on display.

And there was an exhibit area where you could meet the companies behind many of these stories and learn more about them.

This … Read More


TSMC’s AI Design Kit: Bringing Agentic AI Into Chip Design

TSMC’s AI Design Kit: Bringing Agentic AI Into Chip Design
by Daniel Nenni on 10-01-2026 at 10:00 am

TSMC’s AI Design Kit Bringing Agentic AI Into Chip Design

TSMC is introducing an AI Design Kit, or ADK, to help artificial intelligence tools make better use of its semiconductor manufacturing knowledge. The idea is to give AI agents that run chip-design workflows a technology-specific foundation, so they can adjust designs toward performance, power and area targets with less manual… Read More


TSMC OIP Ecosystem Forum 2026: Broadcom’s View of ASICs and Ecosystems

TSMC OIP Ecosystem Forum 2026: Broadcom’s View of ASICs and Ecosystems
by Mike Gianfagna on 09-30-2026 at 12:00 pm

TSMC OIP Ecosystem Forum 2026 Broadcom’s View of ASICs and Ecosystems

I spent a significant part of my career in the ASIC business. This segment of semiconductors has always been challenging, difficult and invigorating. There is something special about delivering a working custom chip that enables your customer to bring a world-changing product to market. It has always been a highly competitive… Read More


Why Advanced Chip Packaging Is Becoming a Design Problem

Why Advanced Chip Packaging Is Becoming a Design Problem
by Daniel Nenni on 09-29-2026 at 2:00 pm

Why Advanced Chip Packaging Is Becoming a Design Problem

As chipmakers put more computing power into a single system, the challenge extends beyond making individual chips faster. They must connect multiple chips, memory stacks, power supplies, and sometimes optical components in a compact package. In the2026 TSMC OIP Forum talk “Addressing Inter-Die Complexity for 3D Multi-Die… Read More


Siemens and TSMC push AI deeper into chip design

Siemens and TSMC push AI deeper into chip design
by Daniel Nenni on 09-29-2026 at 8:00 am

Siemens and TSMC push AI deeper into chip design

Siemens and TSMC are expanding their collaboration on semiconductor design tools, with a focus on AI assisted workflows, advanced chip packaging and support for newer manufacturing processes. Their announcement centers on an AI agent intended to find and fix design rule violations: errors that can prevent a chip layout from… Read More